FPGA Implementation of Artificial Neural Networks
In this paper, a method of classification of handwritten signature based on neural networks, and FPGA implementation is proposed. The designed architecture is described using Very High Speed Integrated Circuits Hardware Description Language (VHDL).
The proposed application consists of features extraction from handwritten digit images, and classification based on Multi Layer Perceptron (MLP).
The training part of the neural network has been done by using MATLAB program; the hardware implementations have been developed and tested on an Altera DE2-70 FPGA.
Keywords: ANN, VHDL, FPGA,MLP.
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ABOUT THE AUTHORS
Sami El Moukhlis
Phd Student
Abdessamad Elrharras
Phd Student
Abdellatif Hamdoun
Phd
Sami El Moukhlis
Phd Student
Abdessamad Elrharras
Phd Student
Abdellatif Hamdoun
Phd
