Thursday 21st of September 2017

Architecture Exploration of Multicore Systems-on-Chip using a TLM-based Framework

Mona Safar, Magdy A. El-Moursy, Mohamed Abdelsalam and Ashraf Salem

A framework for TLM architecture exploration of multi-core systems is presented. Starting with a Task Precedence Graph (TPG) as a design entry, different architectures with different number of processor cores, number of busses, task-to-processor and channel-to-bus mappings are automatically generated. The viability and potential of the proposed approach is demonstrated by an illustrative example

Keywords: TLM, SoC, Architecture Exploration, Multi-Core

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Mona Safar
received the B.S, M.S, and Ph.D. degrees in computer engineering from the Ain Shams University, Cairo, Egypt, in 2004, 2007 and 2011, respectively. She is currently an assistant professor in the Computer and Systems Department, Faculty of Engineering, Ain Shams University, Cairo, Egypt. Her research interests include reconfigurable computing, application specific architectures, computer-aided design and system-level design.

Magdy A. El-Moursy
was born in Cairo, Egypt in 1974. He received the B.S. degree in electronics and communications engineering (with honors) and the Master\'s degree in computer networks from Cairo University, Cairo, Egypt, in 1996 and 2000, respectively, and the Master\'s and the Ph.D. degrees in electrical engineering in the area of high-performance VLSI/IC design from University of Rochester, Rochester, NY, USA, in 2002 and 2004, respectively. In summer of 2003, he was with STMicroelectronics, Advanced System Technology, San Diego, CA, USA. Between September 2004 and September 2006 he was a Senior Design Engineer at Portland Technology Development, Intel Corporation, Hillsboro, OR, USA. During September 2006 and February 2008 he was assistant professor in the Information Engineering and Technology Department of the German University in Cairo (GUC), Cairo, Egypt. Dr. El-Moursy is currently Staff Engineer in the Mentor Graphics Corporation, Cairo, Egypt. His research interest is in Networks-on-Chip, interconnect design and related circuit level issues in high performance VLSI circuits, clock distribution network design, and low power design. He is the author of more than 40 papers, four book chapters, and two books in the fields of high speed and low power CMOS design techniques and high speed interconnect, NoC and SoC.

Mohamed Abdelsalam
received his B.Sc. and M.S Degree from Ain-Shams University, Cairo, Egypt, and Doctor of Information Science and Technology from Osaka University, Osaka, Japan. He joined Mentor Graphics 1998-2002 working in SW development of circuit simulation and IC layout tools, and development of ModuleWare library in FPGA Advantage/HDS tool, and again in 2008 to present, in Global R&D Egypt MED solutions as Technical lead, working on hardware emulation targets, Memory softmodels and Transaction/Virtual based Solutions. His research interest is in HW/SW co-design, System level design, and HW modeling of communication protocols IPs.

Ashraf Salem
is Engineering Director in Mentor Graphics Egypt. He manages a group of 110 engineers working in the development of Emulation, Simulation Embedded Systems and Automotive products. Dr. Salem obtained his Ph.D. from Grenoble University, France in 1992. He got his B.Sc. and M.Sc. in Computer Engineering from Ain Shams University in 1983, 1987 respectively. He was the CEO of the Technology Innovation and Entrepreneurship Center (TIEC) and professor of Computer Engineering, Faculty of Engineering, Ain Shams University. Dr. Salem participated in the establishment of ANACAD branch in Egypt in 1995 that then has been acquired by Mentor Graphics and became one of the largest multinational development centers. Dr. Salem is participated in the establishment of Software Engineering Competence Center and Information Technology Institute in Egypt. He published more than 100 scientific articles in the fields of Computer Aided design of Digital circuits. He chaired the technical committees in a number of international conference, and he supervised more than 20 PhD and M. Sc. thesis in digital design and Embedded systems. Also, he participated in a number of international research projects and developed one of the pioneer research product for circuit verification in the eighties

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