VLSI Implementation of Hybrid Algorithm Architecture for Speech Enhancement
The speech enhancement techniques are required to improve the speech signal quality without causing any offshoot in many applications. Recently the growing use of cellular and mobile phones, hands free systems, VoIP phones, voice messaging service, call service centers etc. require efficient real time speech enhancement and detection strategies to make them superior over conventional speech communication systems. The speech enhancement algorithms are required to deal with additive noise and convolutive distortion that occur in any wireless communication system. Also the single channel (one microphone) signal is available in real environments. Hence a single channel hybrid algorithm is used which combines minimum mean square error-log spectral amplitude (MMSE-LSA) algorithm for additive noise removal and the relative spectral amplitude (RASTA) algorithm for reverberation cancellation. The real time and embedded implementation on directly available DSP platforms like TMS320C6713 shows some defects. Hence the VLSI implementation using semi-custom (e.g. FPGA) or full-custom approach is required. One such architecture is proposed in this paper.
Keywords: Speech Enhancement, Additive Noise, MMSE Algorithm, RASTA Algorithm, Hybrid Algorithm.
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ABOUT THE AUTHORS
Jigar Shah
Prof. Jigar H. Shah had obtained B.E. (Electronics) degree in 1997 and M.E. (Microprocessor Systems and Applications) in 2006. Presently he is pursuing Ph.D. degree from the M.S. University of Baroda, Vadodara under the guidance of Prof. Satish K. Shah. He is currently employed with SVMIT, Bharuch, Gujarat State, India as an associate professor. He has published two research papers in international journals, five research papers in various international conferences and five research papers in national conferences. He has also five book titles viz. Digital Signal Processing, Basic Electronics, Advance Electronics, Digital Logic Design and Engineering Physics. His current research interests are in the area of Speech Enhancement, Digital Signal Processing, and Embedded and VLSI systems. He is also life member of ISTE and IETE.
Satish Shah
Prof. Satish K. Shah had obtained B.Sc. (Physics) degree in 1970 and M.E. (Automatic Control Engineering) in 1972. He is currently employed with Faculty of Technology and Engineering, The M.S. University of Baroda, Vadodara, Gujarat State, India as a professor and head. He is registered as a Ph.D. supervisor in several universities. He has published several research papers in international journals and in various international and national conferences. He has also two book titles viz. 8051 Microcontrollers: MCS Family and its variants, Embedded DSP System Design and Implementation using TI Digital Signal Processors. His current research interests are in the area of Control System Engineering, Digital Image & Signal Processing, Embedded Controllers, MIMO Systems, and Wireless Networking & Communication. He is also life member of ISTE, IETE, IE(I), IEEE and ISA.
Jigar Shah
Prof. Jigar H. Shah had obtained B.E. (Electronics) degree in 1997 and M.E. (Microprocessor Systems and Applications) in 2006. Presently he is pursuing Ph.D. degree from the M.S. University of Baroda, Vadodara under the guidance of Prof. Satish K. Shah. He is currently employed with SVMIT, Bharuch, Gujarat State, India as an associate professor. He has published two research papers in international journals, five research papers in various international conferences and five research papers in national conferences. He has also five book titles viz. Digital Signal Processing, Basic Electronics, Advance Electronics, Digital Logic Design and Engineering Physics. His current research interests are in the area of Speech Enhancement, Digital Signal Processing, and Embedded and VLSI systems. He is also life member of ISTE and IETE.
Satish Shah
Prof. Satish K. Shah had obtained B.Sc. (Physics) degree in 1970 and M.E. (Automatic Control Engineering) in 1972. He is currently employed with Faculty of Technology and Engineering, The M.S. University of Baroda, Vadodara, Gujarat State, India as a professor and head. He is registered as a Ph.D. supervisor in several universities. He has published several research papers in international journals and in various international and national conferences. He has also two book titles viz. 8051 Microcontrollers: MCS Family and its variants, Embedded DSP System Design and Implementation using TI Digital Signal Processors. His current research interests are in the area of Control System Engineering, Digital Image & Signal Processing, Embedded Controllers, MIMO Systems, and Wireless Networking & Communication. He is also life member of ISTE, IETE, IE(I), IEEE and ISA.
