Thursday 25th of April 2024
 

Survey of NoC and Programming Models Proposals for MPSoC


Eduard Fernandez-Alonso, David Castells-Rufas, Jaume Joven and Jordi Carrabina

The aim of this paper is to give briefing of the concept of network-on-chip and programming model topics on multiprocessors system-on-chip world, an attractive and relatively new field for academia. Numerous proposals from academia and industry are selected to highlight the evolution of the implementation approaches both on NoC proposals and on programming models proposals.

Keywords: Survey, Network-on-Chip, Parallel Programming, Multiprocessor

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ABOUT THE AUTHORS

Eduard Fernandez-Alonso
Eduard Fernandez-Alonso received his BsC degree in Computer Science and MsC degree in Micro and Nano Electronics from Universitat Autònoma de Barcelona (UAB), Bellaterra, Spain. He is currently at CaiaC (Centre for research in Ambient Intelligence and Accessibility in Catalonia), research center at Universitat Autònoma de Barcelona, where he is doing his PhD studies. His main research interests include parallel computing, Network-on-Chip-Based Multiprocessor Systems, and parallel programming models.

David Castells-Rufas
David Castells-Rufas received his BsC degree in Computer Science from Universitat Autònoma de Barcelona. He holds a MsC in Research in Microelectronics from Universitat Autònoma de Barcelona. He is currently the head of the Embedded Systems unit at CAIAC Research Centre at Universitat Autònoma de Barcelona (UAB), where he is doing his PhD studies. His primary research interests include parallel computing, Network-on-Chip Based Multiprocessor Systems, and parallel programming models. He is also associate lecturer in the Microelectronics department of the same university.

Jaume Joven
Jaume Joven received his MsC degree and PhD degree in Computer Science from Universitat Autònoma de Barcelona (UAB). During his research, he received the best paper award for “xENoC - An eXperimental Network-On-Chip Environment for Parallel Distributed Computing on NoC-based MPSoC Architectures\". Nowadays, he continues his research career as a post-doc researcher at EPFL-LSI/iNoCs. His main research interests are focused on the embedded NoC-based MPSoCs, ranging from circuit and system-level design of custom NoCs architectures, up to system-level software for QoS resource allocation and runtime reconfiguration, as well as, middleware and parallel programming models

Jordi Carrabina
Jordi Carrabina leads CAIAC Research Centre at Universitat Autònoma de Barcelona (Spain), member of Catalan IT network TECNIO. He received his PhD degree from Universitat Autònoma de Barcelona. His main interests are Microelectronic Systems oriented to Embedded Platform-based Design using System Level Design Methodologies using SoC/NoC Architectures and Printed Microelectronics Technologies in the Ambient Intelligence Domain. He is a Prof. T. at Universitat Autònoma de Barcelona where is Teaching EE and CS at the Engineering School and in the MA of Micro & Nanoelectronics Engineering and Multimedia technologies, at UAB and Embedded Systems at UPV-EHU.


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