Thursday 28th of March 2024
 

Performance Metrics of a Reconfigurable Fabric


Muaad Abu-Faraj

Performance metrics of reconfigurable systems have largely focused on the relative performance of specific algorithms on the fabric compared against the same algorithm on a general-purpose processor or ASIC device. Here we introduce a number of metrics, which relate purely to the act and cost of reconfiguration, independent of implementation or algorithm. We specifically introduce the notation of total and relative gate efficiency, power, and granularity

Keywords: Dynamic Reconfigurable Fabric (DRF), Granularity, Power, complexity, and Efficiency

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ABOUT THE AUTHOR

Muaad Abu-Faraj
Mua’ad M. Abu-Faraj received the B.Eng. degree in computer engineering from Mu’tah University, Mu’tah, Jordan, in 2004, the M.Sc. degree in computer and network engineering from Sheffield Hallam University, Sheffield, UK, in 2005, and the M.Sc. and Ph.D. degrees in computer science and engineering from the University of Connecticut, Storrs, Connecticut, USA, in 2012. He is, at present, assistant professor at the University of Jordan, Aqaba, Jordan. He is currently serving as reviewer for the IEEE Micro, IEEE Transactions on Computers, Journal of Supercomputing, and International Journal of Computers and Their Applications (IJCA). His research interests include computer architecture, reconfigurable hardware, cryptography, and wireless networking. Dr. Abu-Faraj is a member of the IEEE, ISCA (International Society of Computers and their Applications), and JEA (Jordan Engineers Association).


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