OpenMP performance analysis for many-core platforms with non-uniform memory access
One of the first steps in embedded-system design flow is to choose the most efficient implementation of the embedded software application. However, this is difficult to do at the earliest design stages because particular details of the final many- core HW platform are usually unknown and many possible mappings of the software tasks/threads have to be evaluated. This paper presents a complete framework for early performance estimation of parallel programs in many-core platforms. The proposed framework is based on a specific native-simulation approach oriented to many-core platforms, which enables fast simulation and profiling. The software parallelism is specified in OpenMP, a commonly used application software interface (API) for shared-memory parallel programming. In order to support Non-Uniform Memory Access (NUMA) architectures (which are dominant in high-performance many-core platforms), the paper proposes some OpenMP extensions. These extensions improve performance analysis and facilitate the automatic translation from OpenMP to OpenCL (a low-level API for heterogeneous computing), which are commonly used for NUMA programming). Results show that the proposed OpenMP extension and specific parallel modeling techniques provide reliable results even for NUMA architectures.
Keywords: OpenMP,OpenCL, performance analysis, many-core, NUMA, early estimation.
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ABOUT THE AUTHORS
Pablo González De Aledo Marugán
Pablo González de Aledo studied Telecomunications Engineering in the University of Cantabria and finished his studies in the Network-on-Chip team in ST-Microelectronics Grenoble. In2012 he obtained a research grant from the Ministry of Education and he is doing research in the Microelectronics Engineering Group improving the modeling and simulation of high-performance, multi-core and heterogeneous platforms.
Javier González-Bayón
Javier González-Bayón was born in Santander, Spain, in 1979. He received the Telecommunications Engineering degree from the University of Cantabria (UC) in 2004. He obtained his Ph. D. in the Dept. of Electronic Engineering at the Universidad Politécnica de Madrid in 2011. He is currently working at the Microelectronics Engineering Group in the UC. His main research interests include performance estimation of parallelized programs in shared-memory many-core platforms.
Pablo Sánchez
Pablo Sánchez received the Ph.D. in Physics (Electronics) from the University of Cantabria, Santander, Spain, in 1991. He is currently an Associate Professor of Electronic Technology with the Department of Electronic Technology, Engineering and Systems of the University of Cantabria. He is the author of more than 60 international papers and project leader of several ITEA, ARTEMIS, ENIAC and CATRENE projects. His current research interests include Real-time Image Processing and Embedded Systems Design and Verification Methodologies.
Juan Casal
Juan Casal has a Technical Telecomunications Engineering degree and a Technical IT Engineering degree. He has worked in signal processing applications for the last 13 years. He has been working in SAPEC since 2002, from 2006 as Project Manager, leading the video encoding algorithm development team. He has represented SAPEC in many Spanish and European R&D projects. He has participated in the development of most of the equipment included in SAPEC\'s current product portfolio.
Pablo González De Aledo Marugán
Pablo González de Aledo studied Telecomunications Engineering in the University of Cantabria and finished his studies in the Network-on-Chip team in ST-Microelectronics Grenoble. In2012 he obtained a research grant from the Ministry of Education and he is doing research in the Microelectronics Engineering Group improving the modeling and simulation of high-performance, multi-core and heterogeneous platforms.
Javier González-Bayón
Javier González-Bayón was born in Santander, Spain, in 1979. He received the Telecommunications Engineering degree from the University of Cantabria (UC) in 2004. He obtained his Ph. D. in the Dept. of Electronic Engineering at the Universidad Politécnica de Madrid in 2011. He is currently working at the Microelectronics Engineering Group in the UC. His main research interests include performance estimation of parallelized programs in shared-memory many-core platforms.
Pablo Sánchez
Pablo Sánchez received the Ph.D. in Physics (Electronics) from the University of Cantabria, Santander, Spain, in 1991. He is currently an Associate Professor of Electronic Technology with the Department of Electronic Technology, Engineering and Systems of the University of Cantabria. He is the author of more than 60 international papers and project leader of several ITEA, ARTEMIS, ENIAC and CATRENE projects. His current research interests include Real-time Image Processing and Embedded Systems Design and Verification Methodologies.
Juan Casal
Juan Casal has a Technical Telecomunications Engineering degree and a Technical IT Engineering degree. He has worked in signal processing applications for the last 13 years. He has been working in SAPEC since 2002, from 2006 as Project Manager, leading the video encoding algorithm development team. He has represented SAPEC in many Spanish and European R&D projects. He has participated in the development of most of the equipment included in SAPEC\'s current product portfolio.
