Saturday 20th of April 2024
 

Loss-Aware Router Design Approach for Dimension- Ordered Routing Algorithms in Photonic Networks-on-Chip


Mehdi Hatami Rad, Akram Reza, Hesam Shabani, Behrad Niazmand and Midia Reshadi

Photonic-Network-on-chip (PNoC) has been proposed as a promising solution for the communication infrastructure of Chip Multiprocessors (CMPs) and as a solution to overcome the constraints in traditional NoCs. Photonic NoCs provide the opportunity of increasing both the bandwidth and the number of cores significantly, and can improve performance and the cost parameters of CMPs. In this paper, a designing approach for a photonic router has been proposed in order to reduce insertion loss in photonic NoCs, which can in turn increase network throughput, since it uses more parallel wavelengths. It has also led to the design of a router structure exclusively for XY routing algorithm. The proposed router shows an improvement of up to 52% in insertion loss, when compared to other proposed routers.

Keywords: Photonic NoCs, Insertion Loss, XY Routing Algorithm, Non-blocking

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ABOUT THE AUTHORS

Mehdi Hatami Rad
Mehdi Hatamirad received B.Sc. degree in computer engineering in 2009 from Tehran central branch of Islamic Azad University, Tehran, Iran. Currently, he is working toward his M.S. degree in computer architecture at Department of Computer Engineering, Science and Research Branch of Islamic Azad University, Tehran, Iran. His research interests are multiprocessor architectures, Networks-on-Chip and Photonic Networks-on-Chip. He is a student member of IEEE.

Akram Reza
Akram Reza received his B.Sc. from Islamic Azad University, Ghazvin, Iran in 2005 in hardware engineering, and her M.S. from Science and Research Branch of Islamic Azad University, Tehran, Iran in 2008 in computer architecture Engineering. She is currently working toward the Ph.D. degree in computer architecture engineering at the Science and Research Branch of IAU. Her research interests lie in Photonic Networks-on-chip and yield issues in Networks-on-chip. She is a student member of IEEE.

Hesam Shabani
Hesam Shabani received B.Sc. degree in computer engineering in 2009 from Islamic Azad University, Farahan, Iran. Currently, he is working toward his M.S. degree in computer architecture at Department of Computer Engineering, Science and Research Branch of Islamic Azad University, Tehran, Iran. His research interests are computer arithmetic, Photonic Networks-on Chip. He is a student member of IEEE.

Behrad Niazmand
Behrad Niazmand received B.Sc. degree in computer engineering in 2009 from Islamic Azad University South Tehran Branch, Tehran, Iran. Currently, he is working toward his M.S. degree in computer architecture at Department of Computer Engineering, Science and Research Branch of Islamic Azad University, Tehran, Iran. His research interests are Hardware Modeling, Network-on-Chip and Photonic Network-on-Chip. He is a student member of IEEE.

Midia Reshadi
Midia Reshadi received his M.Sc. degree in computer architecture from Science and Research Branch of Islamic Azad University (SRBIAU), Tehran, Iran in 2005. He also received his Ph.D. degree in computer architecture from SRBIAU, Tehran, Iran in 2010. He is currently Assistant Professor in Faculty of Electrical and Computer Engineering of SRBIAU. His research interests include Photonic NoCs, fault and yield issues in NoCs, routing and switching in on-chip communication networks. He is a member of IEEE.


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