High Performance Charge Pump Phase-Locked Loop with Low Current Mismatch
In CMOS CPs, which have Up and Down switches made of p-channel and n-channel respectively, generates fluctuations in the VCO due to current mismatch occurs when dumping the charge to the loop filter and subsequently a large phase noise on the PLL output. This paper presents a new CP circuit after detailed analysis of the current mismatch problem. It combines an error amplifier with reference current sources to achieve good current matching characteristics and lower phase noises. Charge sharing can be eliminated by using charge removal transistors. In addition, a low-voltage cascode current mirror and gain-boosting circuit are used to enhance current matching over process corners and increase the output impedance of the CP. Good current matching characteristic is achieved with less than 0.1% difference of the Up/Down current and 1% over all process variations. The CP output compliance voltage range of 0.1-1.8 V is achieved for 1.8-V supply voltage. The circuit was designed using 0.18um TSMC CMOS technology and simulated by Spectre tools.
Keywords: Charge pump (CP), gain-boosting charge pump, Voltage Controlled Oscillator (VCO) low-voltage cascode current mirror, phase-locked loop (PLL).
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ABOUT THE AUTHORS
V. Sujatha
V.Sujatha received M.E degree in Applied Electronics from Anna University,Chennai in 2004 and the Bachelor degree in Electronics & Communication Engineering from Madras University in 1993.She is working as a Professor and Head of the Department of electronics and communication Engineering, Shree Sathyam College of Engineering and Technology,Sankari.She is a member of ISTE, IETE and IEEE. She published several papers in National and International conferences. Her area of research is low jitter charge pump PLL and testing of PLL.
R. S. D. Wahida Banu
Received the Ph.D. degree in Engineering from Anna University, Chennai, in 1998. Her areas of interest are Network security, Neural networks, system-on-a-chip design, She is a life member of IEEE,ISTE,CSI,SSI and member in ISOC and ,VDAT.She is a co-Author of the books titled as Object Oriented Programming Visual Programming, Data mining application for empowering Knowledge societies. To her credit she authored and co-authored not less than 200 research papers in International, National journals and Conferences. She bagged the Best Woman Engineer Award- 2009, Salem Local Chapter, Indian Institute of Engineers. Currently she is working as a Professor and Head of the department of Electronics and Communication Engineering, Government college of Engineering, Salem.
V. Sujatha
V.Sujatha received M.E degree in Applied Electronics from Anna University,Chennai in 2004 and the Bachelor degree in Electronics & Communication Engineering from Madras University in 1993.She is working as a Professor and Head of the Department of electronics and communication Engineering, Shree Sathyam College of Engineering and Technology,Sankari.She is a member of ISTE, IETE and IEEE. She published several papers in National and International conferences. Her area of research is low jitter charge pump PLL and testing of PLL.
R. S. D. Wahida Banu
Received the Ph.D. degree in Engineering from Anna University, Chennai, in 1998. Her areas of interest are Network security, Neural networks, system-on-a-chip design, She is a life member of IEEE,ISTE,CSI,SSI and member in ISOC and ,VDAT.She is a co-Author of the books titled as Object Oriented Programming Visual Programming, Data mining application for empowering Knowledge societies. To her credit she authored and co-authored not less than 200 research papers in International, National journals and Conferences. She bagged the Best Woman Engineer Award- 2009, Salem Local Chapter, Indian Institute of Engineers. Currently she is working as a Professor and Head of the department of Electronics and Communication Engineering, Government college of Engineering, Salem.
