FPGA-based load test accelerator
The information systems play the main role at a current time. These systems collect, control and give information for many users. Information by itself becomes the most valuable resource on a whole world. That is why reliability of computer systems is important. The main way to check, if the system works properly during development process, is testing. This paper represents results of our work on improvement of load testing. We propose new method of creating load, which is based on using a module with FPGA. On this paper we provided results of experiments for that module evaluation. Additionally to it, for compare, here there are represented results of experiments for estimation of a load capability of current computer systems. These results show how much time is needed for network stack processing on modern operation systems launched on computers with adequate hardware characteristics.
Keywords: load testing, FPGA, load creation, load capability, OS network stack evaluation.
Download Full-Text
ABOUT THE AUTHOR
Anton Borodin
Borodin Anton A. was born in the 19th of September 1988 in Tashkent (Uzbekistan). He received his BS degree and engineer’s degree on computer science from Moscow State Forest University (Russia) in 2009 and 2010. At current time he is an assistant at Department of Computer Science on Moscow State Forest University and is working on his Ph.D. thesis. His research interests include embedded systems, FPGA, load testing and computer networks.
Anton Borodin
Borodin Anton A. was born in the 19th of September 1988 in Tashkent (Uzbekistan). He received his BS degree and engineer’s degree on computer science from Moscow State Forest University (Russia) in 2009 and 2010. At current time he is an assistant at Department of Computer Science on Moscow State Forest University and is working on his Ph.D. thesis. His research interests include embedded systems, FPGA, load testing and computer networks.
