Design, Simulation and Hardware implementation of Low Density Parity Check Decoders using Min-Sum Algorithm
A Variable Node Processing Unit (VNPU) and a Check Node Processing Unit (CNPU) are designed in order to be used in Low Density Parity Check (LDPC) decoding by the Min-Sum Algorithm (MSA). The designed blocks are fully parallel and flexible to be used for different block length when a regular (3, 6) LDPC codes are required. The proposed VNPU and CNPU have been first designed and implemented in software using Simulink tool following a modular design approach. In a second step, these blocks were described and simulated using Very High Speed integrated circuits Hardware Description Language (VHDL). Comparison between these two implementations shows that the proposed high level methodology is efficient to test and validate digital circuits before being implemented on desired Field Programmable Gate Array (FPGA) device.
Keywords: MSA, LDPC, VHDL, hardware, implementation, FPGA.
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ABOUT THE AUTHORS
Abdessalam Ait Madi
Abdessalam Ait madi was born in Morocco. In 1993 he received the teaching degree in electronic engineering from the ENSET of Mohammedia (Morocco). In 2007 he received his master from the faculty of science and technology (FST) of Fez and joined the team of the Laboratory of Signals, Systems and Components (LSSC). His research interests include Channel coding, Optimization Techniques and Digital VLSI architecture for LDPC decoders.
Anas Mansouri
Anas Mansouri received M.S. and Ph.D degrees in Microelectronics and Telecommunication from Faculty of sciences & technology, Fes, MOROCCO, in 2005 and 2009, respectively. He is a Assistant Professor in National School of Applied Sciences, Fes. His major research interests include VLSI and embedded architectures design, video and image Processing.
Ali Ahaitouf
Dr. Ali Ahaitouf is actually professor in the faculty of science and technology of Fez, at the Sidi Mohammed Ben Abdellah University. He obtained his PhD in electronic in 1992 at the University of Metz in France, then he earned his Doctor title in physics in1998 in Fez. His research focuses on the semiconductor based components, designing analog and digital integrated circuits. He is currently head of the team components and microelectronics in the signal systems and component laboratory. He has published more than twenty articles in specialized review and he is co-author in the Analog Circuits : Application, Design and performances, Nova Sciences publishers, Inc.,2011, ISBN : 978-1-61324-355-8, Chapter 9 : Application of the ACO technique to optimization of analog circuits performances, pp 235–255.
Abdessalam Ait Madi
Abdessalam Ait madi was born in Morocco. In 1993 he received the teaching degree in electronic engineering from the ENSET of Mohammedia (Morocco). In 2007 he received his master from the faculty of science and technology (FST) of Fez and joined the team of the Laboratory of Signals, Systems and Components (LSSC). His research interests include Channel coding, Optimization Techniques and Digital VLSI architecture for LDPC decoders.
Anas Mansouri
Anas Mansouri received M.S. and Ph.D degrees in Microelectronics and Telecommunication from Faculty of sciences & technology, Fes, MOROCCO, in 2005 and 2009, respectively. He is a Assistant Professor in National School of Applied Sciences, Fes. His major research interests include VLSI and embedded architectures design, video and image Processing.
Ali Ahaitouf
Dr. Ali Ahaitouf is actually professor in the faculty of science and technology of Fez, at the Sidi Mohammed Ben Abdellah University. He obtained his PhD in electronic in 1992 at the University of Metz in France, then he earned his Doctor title in physics in1998 in Fez. His research focuses on the semiconductor based components, designing analog and digital integrated circuits. He is currently head of the team components and microelectronics in the signal systems and component laboratory. He has published more than twenty articles in specialized review and he is co-author in the Analog Circuits : Application, Design and performances, Nova Sciences publishers, Inc.,2011, ISBN : 978-1-61324-355-8, Chapter 9 : Application of the ACO technique to optimization of analog circuits performances, pp 235–255.
