Design of an energy-efficient CNFET Full Adder Cell
In this paper by using the carbon nanotube field effect transistor (CNFET), which is a promising alternative for the MOSFET transistor, two novel energy-efficient Full Adders are proposed. The proposed Full Adders show full swing logic and strong output drivability. The first design uses eight transistors and nine capacitors and the second design utilizes three capacitors less than the first design. Simulations, carried out using HSPICE based on the Stanford University CNFET model at 0.6V and 0.9V supply voltages, demonstrate the efficiency of type proposed circuit parameters such as delay, power and power-delay product.
Keywords: Full Adder, Carbon NanoTube, CNFET, high performance, low power, Nanoelectronic.
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ABOUT THE AUTHORS
Arezoo Taeb
Arezoo Taeb received her B.Sc. degree in computer engineering from Islamic Azad University, Khoy, Iran, in 2009. She’s M.Sc. student in Computer System Architecture at Science and Research University branch of IAU, Tehran, Iran. Her current research interests include low-power and high performance VLSI designs and computer arithmetic.
Keivan Navi
Keivan Navi received the B.Sc. and M.Sc. degrees in computer hardware engineering from Beheshti University, Tehran, Iran, in 1987 and Sharif University of Technology, Tehran, Iran, in 1990, respectively. He also received the Ph.D. degree in computer architecture from Paris XI University, Paris, France, in 1995. He is currently Associate Professor in faculty of electrical and computer engineering of Beheshti University. His research interests include VLSI design, single electron transistors (SET), carbon nano tube, computer arithmetic, interconnection network and quantum computing. He has published over 70 ISI and research journal papers and over 70 IEEE, international and national conference paper.
Mohammadreza Taheri
Mohammadreza Taheri received B.Sc. degree in hardware engineering from Isfahan University, Iran, in 2007, and the M.Sc. degree at the Science and Research University branch of IAU, Tehran, Iran, in 2011 in computer system architecture. He is currently research assistance in Microelectronic Laboratory of Shahid Beheshti University, Tehran, Iran. His research interests include Cryptography, Computer Arithmetic with emphasis on Residue Number System and VLSI modeling and design of ultra-low power arithmetic circuits.
Ali Zakerolhoseini
Ali Zakerolhoseini received the BSc degree from university of Coventry, UK, in 1985, MSc from the Bradford University, UK, in 1987, and PhD degree in Fast transforms from the University of Kent, UK, in 1998. He is currently been an assistant professor in the department of Electrical and Computer Engineering at Shahid Beheshti University, Iran. His research focuses on Reconfigurable device and multi classifiers. His current research interests are Data Security, Cryptography, Reconfigurable Computing and Computer Architecture.
Arezoo Taeb
Arezoo Taeb received her B.Sc. degree in computer engineering from Islamic Azad University, Khoy, Iran, in 2009. She’s M.Sc. student in Computer System Architecture at Science and Research University branch of IAU, Tehran, Iran. Her current research interests include low-power and high performance VLSI designs and computer arithmetic.
Keivan Navi
Keivan Navi received the B.Sc. and M.Sc. degrees in computer hardware engineering from Beheshti University, Tehran, Iran, in 1987 and Sharif University of Technology, Tehran, Iran, in 1990, respectively. He also received the Ph.D. degree in computer architecture from Paris XI University, Paris, France, in 1995. He is currently Associate Professor in faculty of electrical and computer engineering of Beheshti University. His research interests include VLSI design, single electron transistors (SET), carbon nano tube, computer arithmetic, interconnection network and quantum computing. He has published over 70 ISI and research journal papers and over 70 IEEE, international and national conference paper.
Mohammadreza Taheri
Mohammadreza Taheri received B.Sc. degree in hardware engineering from Isfahan University, Iran, in 2007, and the M.Sc. degree at the Science and Research University branch of IAU, Tehran, Iran, in 2011 in computer system architecture. He is currently research assistance in Microelectronic Laboratory of Shahid Beheshti University, Tehran, Iran. His research interests include Cryptography, Computer Arithmetic with emphasis on Residue Number System and VLSI modeling and design of ultra-low power arithmetic circuits.
Ali Zakerolhoseini
Ali Zakerolhoseini received the BSc degree from university of Coventry, UK, in 1985, MSc from the Bradford University, UK, in 1987, and PhD degree in Fast transforms from the University of Kent, UK, in 1998. He is currently been an assistant professor in the department of Electrical and Computer Engineering at Shahid Beheshti University, Iran. His research focuses on Reconfigurable device and multi classifiers. His current research interests are Data Security, Cryptography, Reconfigurable Computing and Computer Architecture.
