Thursday 28th of March 2024
 

A Modular Network Interface Design and Synthesis Outlook


Brahim Attia, Abdelkirm Zitouni, Wissem Chouchenne, Kholdoun Torki and Rached Tourki

In recent years, as System on Chip design research is actively conducted, a large number of IPs is included in a system based on a Network on Chip(NoC). Different interfaces specification of IP cores and different flow controls are used by router. They raise a considerable difficulty for adopting NoC techniques. To facilitate the use of the NoC techniques an efficient design of the network interface (NI) unit that connects the switched network to the IP cores is required. In this paper, we present a new NI architecture for NoC with low latency and jitter constraints. We introduce a new distributed buffer structure that increases area and reduces latency and jitter. We present how we can apply the decoupling between computing and communication by proposing a modular architecture. The low latency and minimal jitter between packets are obtained through the separation between header and payload memories. This separation enables the NI to receive a new packet before the end of the transmission of a previous packet. The modular design is obtained through the separations between injection and extraction path and between IP and network sides. The latter separation allows IPs and NoC to be designed independently from each other. For evaluating the efficiency of this approach, we use AHB standard at the IP side and we use the most three used flow controls in NoC. A performance study was conducted and NI designs were synthesized with ST 0.13#956;m CMOS technology using four different libraries. Experimental results show that the proposed NIs allow better results in terms of latency, jitter and dissipated power relatively to the current published state-of-the art NI architectures.

Keywords: Network Interface, Network on Chip, ASIC, Low latency, Low power

Download Full-Text


ABOUT THE AUTHORS

Brahim Attia
Brahim Attia received the MSc degree in analysis and processing of electronics systems from Faculty of Sciences of Tunisia, Tunisia in 2006. Since 2007 he is a Ph.D student in the Faculty of Sciences of Monastir. From 2007 to 2012 he has joined the Institut Supérieur des Sciences Appliquées et de Technologie de Sousse at Université of Sousse, as Assistant Professor in the department of Computer Science. He has published several papers in international scientific journals and conferences proceedings. He obtains the best paper award in 23th International conference in microelectronics. He is member of the Electronics and microelectronics Laboratory at FSM and is an associated researcher in Communication synthesis team. His researches interests include the network on chip design flow and automatic synthesis of Network interface for SoC based NoC with various constraints, Image and Video Compression, and low power design.

Abdelkirm Zitouni
Abdelkrim Zitouni was born in Gabès, Tunisia on October 06 1970. He received the D.E.A and the Ph.D. degree in Physics (Electronics option) from Faculty of Sciences of Monastir, Tunisia in 1996 and 2001 respectively. Since 2009 he has been recruited as Professor in Electronics and Microelectronics with the Physics department in the Faculty of Sciences of Monastir. His researches interests are communication synthesis for SoC and asynchronous system design.

Wissem Chouchenne
Wissem Chouchenne was born in Sousse, Tunisia on August 27 1984. He received the Master degree in Physics (Electronics option) from Faculty of Sciences of Monastir, Tunisia in 2011.His is a PhD student in ENIM Monastir, tunisia and lifl lille, France. His researches interests are communication synthesis for SoC and reconfigurable 3D Network on Chip.

Kholdoun Torki
Kouldoun Torki received the Ph.D. degree from the INPG, Grenoble in 1990 and the DEA microelectronics from INPG in 1986. Currently he is the Technical Director of CMP and Project Coordinator for PhD students exchange with the University of Monastir (Tunisia).

Rached Tourki
Rached Tourki was born in Tunis, on May 13 1948. He received the B.S. degree in Physics (Electronics option) from Tunis University, in 1970; the M.S. and the Ph.D. in Electronics from Orsay Electronic Institute, Paris-south University in 1971 and 1973 respectively. From 1973 to 1974 he served as Microelectronics Engineer in Thomson-CSF. He received the Doctorat d’etat in Physics from Nice University in 1979. Since this date he has been Professor in Microelectronics and Microprocessors with the Physics department in the Faculty des of Sciences of Monastir. His researches interests are digital signal processing and Hardware–software codesign for rapid prototyping in telecommunications.


IJCSI Published Papers Indexed By:

 

 

 

 
+++
About IJCSI

IJCSI is a refereed open access international journal for scientific papers dealing in all areas of computer science research...

Learn more »
Join Us
FAQs

Read the most frequently asked questions about IJCSI.

Frequently Asked Questions (FAQs) »
Get in touch

Phone: +230 911 5482
Email: info@ijcsi.org

More contact details »